DMA (Direct Memory Access)
A direct memory access (DMA) is an operation in which data is copied (transported) from one resource to another resource in a computer system without the involvement of the CPU.Direct memory is a capability provided by some computer bus architectures that allows data from a device (such as a disk drive) to be located directly in the computer's memory. The microprocessor is freed from the involvement of data allocation, thus speeding up overall computer operation.
DMA Controller
The term DMA stands for direct memory access The hardware device used for DMA (direct memory access) is called a DMA controller.DMA controller is a control unit, part of 1/0 device's interface circuit, which can transfer blocks of data between I/O devices and main memory with minimal intervention from the processor. The DMA transfers the data in three modes which include the following
a) Burst Mode: In this mode, DMA (Direct Memory Access) transfers data continuously without interrupting the CPU. The DMA controller takes control of the buses and completes the entire data transfer before relinquishing control to the CPU. However, if the CPU needs to access the bus during this time, it must remain idle and wait for the data transfer to finish.
b) Cycle Stealing Mode: In this mode, the DMA gives control of the buses to the CPU after each byte is transferred. It continuously issues a request for bus control, transfers a single byte, and returns the bus. By this the CPU does not have to wait for a long time when the bus is needed for a higher priority task.
c) Transparent Mode: Here, DMA transfers data only when the CPU is executing instructions that do not require the use of buses.
Working of DMA
Step 1: Whenever 170 devices want to transfer the data, it sends a DMA Request to DMAC.
Step 2- After accepting the DMA Request from I/O. DMAC sends a BR (Bus Request signal to the CPU). Note: As we all know that the data transfer could not be possible without the system bus.
Step3:- After receiving BR CPU HOLD the request and fetch the Starting address and what could be the data count and Read write control in Address register, word count register, and control register respectively.
Step 4: After getting all the required information CPU send the address and word count details to address select chip.
Step 5:- Then CPU send a BG(Bus Grant) Signal to DMAC telling that now you are eligible to take the control on System Bus so that DMA acknowledge I/O device to start transferring the data from I/O to memory.
Step 6: After receiving BG DMAC send an ACK to the I/O and the data transfer will start form I/O to memory with the help of Address Select.
Step 7: After completing the data transfer DMAC send an Interrupt signal to the CPU informing that data has been transferred successfully now CPU Revoke the BUS Grant signal and take the control on system bus.
